A Design of Neuro-fuzzy Inference Circuit with Automatic Generation of Membership Functions

In this paper, we propose a neuro-fuzzy inference circuit that generates membership functions and inference rules automatically in the learning process. In this circuit, we use membership functions which are generated by only using NOT operations and bit shift operations and tune only the parameters of the consequent part to reduce the circuit scale. In spite of those limitations, this circuit has high generalization ability obtained by generating new membership functions in the region with the maximum inference error. This circuit is designed by using hardware description language Verilog-HDL and realized on the FPGA(Field Programmable Gate array).